Structure and method to improve SRAM stability without...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S200000

Reexamination Certificate

active

06984564

ABSTRACT:
An SRAM in a CMOS integrated circuit is subjected to stress on the channels of its transistors; compressive stress on the pull-up and pass gate transistors and tensile stress on the pull-down transistors in a version designed to improve stability; and compressive stress on the pull-up transistors and tensile stress on the pull-down and pass gate transistors in a version designed to reduce the cell size and increase speed of operation.

REFERENCES:
patent: 2003/0181005 (2003-09-01), Hachimine et al.
patent: 2004/0029323 (2004-02-01), Shimizu et al.
patent: 2004/0217420 (2004-11-01), Yeo et al.
patent: 2005/0023633 (2005-02-01), Yeo et al.

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