Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-06-14
2011-06-14
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257S758000, C438S622000, C438S637000, C438S641000, C438S652000, C438S653000, C438S675000
Reexamination Certificate
active
07960274
ABSTRACT:
A reliable and mechanical strong interconnect structure is provided that does not include gouging features in the bottom of the an opening, particularly at a via bottom. Instead, the interconnect structures of the present invention utilize a Co-containing buffer layer that is selectively deposited on exposed surfaces of the conductive features that are located in a lower interconnect level. The selective deposition is performed through at least one opening that is present in a dielectric material of an upper interconnect level. The selective deposition is performed by electroplating or electroless plating. The Co-containing buffer layer comprises Co and at least one of P and B. W may optionally be also present in the Co-containing buffer layer.
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Van Der Straten Oscar
Yang Chih-Chao
Chi Suberr
International Business Machines - Corporation
Percello, Esq. Louis J.
Scully , Scott, Murphy & Presser, P.C.
Vu David
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