Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-08-07
2007-08-07
Smith, Bradley K. (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE21508
Reexamination Certificate
active
10954999
ABSTRACT:
A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.
REFERENCES:
patent: 2002/0185309 (2002-12-01), Imamura et al.
patent: 2003/0214036 (2003-11-01), Sarihan et al.
Basiron Mohd Erwan B.
Byrne Tiffany A.
Chin Yoong Tatt P.
Jayaraman Saikumar
Lehman Stephen E.
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
Smith Bradley K.
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