Strained gettering layers for semiconductor processes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S474000, C438S471000, C257SE29003, C257S021000

Reexamination Certificate

active

10956481

ABSTRACT:
A method and structure for forming semiconductor structures using tensilely strained gettering layers. The method includes forming a donor wafer comprising a tensilely strained gettering layer disposed over a substrate, and at least one material layer disposed over the tensilely strained gettering layer. Additionally, the donor wafer may possess a particle-confining region proximate the tensilely strained layer. The method also includes introducing particles into the donor wafer to a depth below the surface, and accumulating at least some particles within the tensilely strained gettering layer. Next, the method includes initiating a cleaving action so as to separate at least one of the material layers form the substrate. The tensilely strained gettering layer may accumulate particles and/or point defects and reduce the implantation dose and thermal budget required for cleaving.

REFERENCES:
patent: 4845044 (1989-07-01), Ariyoshi et al.
patent: 5374564 (1994-12-01), Bruel
patent: 5714395 (1998-02-01), Bruel
patent: 5882987 (1999-03-01), Srikrishnan
patent: 5993493 (1999-11-01), Takamizawa et al.
patent: 6083324 (2000-07-01), Henley et al.
patent: 6184111 (2001-02-01), Henley et al.
patent: 6323108 (2001-11-01), Kub et al.
patent: 6335264 (2002-01-01), Henley et al.
patent: 6352909 (2002-03-01), Usenko
patent: 6391740 (2002-05-01), Cheung et al.
patent: 6458723 (2002-10-01), Henley et al.
patent: 6500732 (2002-12-01), Henley et al.
patent: 6548382 (2003-04-01), Henley et al.
patent: 6632724 (2003-10-01), Henley et al.
patent: 6696352 (2004-02-01), Carr et al.
patent: 6727136 (2004-04-01), Buller et al.
patent: 6774015 (2004-08-01), Cohen et al.
patent: 6787407 (2004-09-01), Nakamura et al.
patent: 6890838 (2005-05-01), Henley et al.
patent: 7008854 (2006-03-01), Forbes
patent: 7067396 (2006-06-01), Aspar et al.
patent: 7105895 (2006-09-01), Wang et al.
patent: 2002/0072130 (2002-06-01), Cheng et al.
patent: 2002/0105015 (2002-08-01), Kubo et al.
patent: 2003/0017626 (2003-01-01), Hilt et al.
patent: 2003/0143794 (2003-07-01), Nakamura et al.
patent: 2003/0148565 (2003-08-01), Yamanaka
patent: 2003/0218189 (2003-11-01), Christiansen et al.
patent: 2004/0178406 (2004-09-01), Chu
patent: 2006/0001088 (2006-01-01), Chan et al.
patent: 2006/0220127 (2006-10-01), Mantl
Agarwal et al., Efficient production of silicon-on-insulator films by co-implantation of He+with H+, App. Phys. Lett. 72, 1086-1088 (1998).
Bruel, Silicon on insulator material technology, Electron Lett. 31, 1201-1202 (1995).
Corni et al., Helium-implanted silicon: A study of bubble precursors, J. Appl. Phys. 85, 1401-1408 (1999).
Corni et al., Solid State Phenomena 69-70, 229-234 (1999).
Johnson, Mechanism for hydrogen compensation of shallow-acceptor impurities in single-crystal silicon, Phys. Rev. B 31, 5525-5528 (1985).
Myers et al., Interaction of coppoer with cavities in silicon, J. Appl. Phys. 79, 1337-1350 (1996).
Langdo et al., SiGe free strained Si on insulator by wafer bonding and layer transfer, Appl. Phys. Lett. 82, No. 24, 4256-4258 (2003).
Pitera et al., Coplanar integration of Lattice-Mismatched Semiconductors with Silicon by Wafer Bonding Ge/Sil-xGex/Si Virtual Substrates, J. Electrochem. Soc. 151, G443-G447 (2004).
Rainerl et al., Gettering of metals by voids in silicon, J. Appl. Phys. 78, 3727-3735 (1995).
Tong et al., A “smarter-cut” approach to low temperature silicon layer transfer, Appl. Phys. Lett. 72, 49-51 (1998).
Ulyashin et al., The hydrogen gettering at post-implantation hydrogen plasma treatments of helium- and hydrogen implanted Czochralski silicon, Materials Science and Engineering B73 B73, 64-68 (2000).
Usenko et al., Transformation of hydrogen trapped onto microbubbles into H platelet layer in SI, Journal of Materials Science: Materials in Electronics 14, 305-309 (2003).
Notification of Transmittal of the International Search Report and the Written Opinion of the ISR for International Application No. PCT/US2005/035595, date mailed Feb. 15, 2006.

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