STI liner for SOI structure

Details STI liner for SOI structure STI liner for SOI structure

2005-10-18

2005-10-18

Chaudhuri, Olik (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S404000, C257S354000

Reexamination Certificate

active

06955955

ABSTRACT:
In a method of manufacturing a semiconductor device, an initial structure is provided. The initial structure includes a substrate, a patterned silicon layer, and a covering layer. The substrate has a buried insulator layer formed thereon. The patterned silicon layer is formed on the buried insulator layer. The covering layer is formed on the patterned silicon layer. A first layer is formed on the initial structure. Part of the first layer is removed with an etching process, such that a sidewall portion of the patterned silicon layer is exposed and such that a remaining portion of the first layer remains at a corner where the patterned silicon layer interfaces with the buried insulator layer. An oxide liner is formed on the exposed sidewall portion. A recess may be formed in the buried insulator layer (prior to forming the first layer) and may extend partially beneath the patterned silicon layer.

REFERENCES:
patent: 6521510 (2003-02-01), Fisher et al.
patent: 6556198 (2003-04-01), Nishikawa
patent: 6566680 (2003-05-01), Krivokapic
patent: 6870225 (2005-03-01), Bryant et al.
patent: 2002/0022308 (2002-02-01), Ahn et al.
patent: 2005/0101072 (2005-05-01), Bryant et al.

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