STI formation in semiconductor device including SOI and bulk...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S506000

Reexamination Certificate

active

11425467

ABSTRACT:
Methods for forming or etching silicon trench isolation (STI) in a silicon-on-insulator (SOI) region and a bulk silicon region, and a semiconductor device so formed, are disclosed. The STI can be etched simultaneously in the SOI and bulk silicon regions by etching to an uppermost silicon layer using an STI mask, conducting a timed etch that etches to a desired depth in the bulk silicon region and stops on a buried insulator of the SOI region, and etching through the buried insulator of the SOI region. The buried insulator etch for this process can be done with little complexity as part of a hardmask removal step. Further, by choosing the same depth for both the bulk and SOI regions, problems with a subsequent CMP process are avoided. The invention also cleans up the boundary between the SOI and bulk regions where silicon nitride residuals may exist.

REFERENCES:
patent: 6724046 (2004-04-01), Oyamatsu
patent: 7122864 (2006-10-01), Nagano et al.
patent: 7229877 (2007-06-01), Cheng et al.
patent: 2002/0190349 (2002-12-01), Maeda et al.
patent: 1411066 (2003-04-01), None

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