Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-05-15
2007-05-15
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S503000, C327S144000, C375S362000
Reexamination Certificate
active
10483511
ABSTRACT:
A status indication detection apparatus comprises an input storage stage, an intermediate storage stage and an output storage stage. Status indications are input into the input register of the input stage and are shifted to the intermediate and to the output stage. The input and intermediate storage stages operate with a first reference clock in a first clock domain whilst the output storage stage operates with a different second reference clock in the second clock domain. In accordance with the invention a reading out of the intermediate register of the intermediate stage is only possible during the generation of a hold signal which keeps a current status indication in the intermediate storage stage and blocks a transfer of a new status indication from the input stage.
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Abendroth, legal representative Maren
Fleer Hans-Ulrich
Du Thuan
Telefonaktiebolaget LM Ericsson (publ)
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