Static volatile/non-volatile ram cell

Details Static volatile/non-volatile ram cell Static volatile/non-volatile ram cell

1979-11-13

1981-06-02

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365 78, 365182, 365184, 365222, 3072383, G11C 1140

Patent

active

042714877

ABSTRACT:
A volatile
on-volatile RAM cell employing a bistable multivibrator with non-volatile, alterable-threshold capacitors coupled to the output terminals thereof to provide backup data storage in a power-down situation. In one embodiment, the non-volatile capacitors each have a non-alterable section and an alterable section, the non-alterable section having either a depletion or an enhancement threshold. The V/NV RAM cell employs a pair of field effect transistors of depletion or enhancement type to couple the non-volatile capacitors to the output terminals. These coupling transistors form with the non-volatile capacitors a pair of nodes. The coupling transistors are biased such that a write voltage signal applied to the gates of the non-volatile capacitors produces a bootstrapped voltage on one of the pair of nodes which is effectively isolated from the output terminals of the cell.

REFERENCES:
patent: 3950737 (1976-04-01), Uchida et al.

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