Static-type semiconductor memory device

Static information storage and retrieval – Systems using particular element – Flip-flop

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365154, 365148, 257537, 257538, G11C 1100

Patent

active

055153135

ABSTRACT:
A static-type memory cell includes a flip-flop circuit formed with a pair of N-channel type MOS transistors for driving provided in a semiconductor substrate and a pair of P-channel type MOS transistor as load elements provided in the upper layer of the pair of driving N-channel type MOS transistors and formed with thin film transistors. The gate electrodes of the pair of P-channel type MOS transistor are load elements and are formed of polycrystalline silicon layers containing 2 to 45 atoms % of oxygen for maintaining high resistance in the P-channel type MOS transistor and thereby provide satisfactory resistance against soft errors.

REFERENCES:
patent: 4961103 (1990-10-01), Saitoh et al.
patent: 5159430 (1992-10-01), Manning et al.
K. Ueda et al., "Improvement of Soft Error Immunity in a Polysilicon PMOS Load Memory Cell", Japanese-Electronics and Communication Association, Autumn Meeting, 1991, Paper C-27, P. 5-141.

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