Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1991-01-28
1993-07-06
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365182, 36523008, 365233, G11C 1300
Patent
active
052260119
ABSTRACT:
A static type RAM performs latch of supplied address signals by rise or fall edge of clock pulses supplied from the outside, and performs the write operation continuously while write control signals are activated, and substantially opens a data output terminal in the period. Also an address buffer of the RAM is activated by a definite time required for the state that the supplied address signals are latched by timing pulses formed based on the clock pulses.
REFERENCES:
patent: 5138579 (1992-08-01), Tatsumi et al.
Fears Terrell W.
Hitachi , Ltd.
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