Static memory device

Static information storage and retrieval – Read/write circuit – Precharge

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Details

36518911, 365190, 365226, G11C 700, G11C 1140

Patent

active

053094018

ABSTRACT:
A static memory device comprises a memory cell array having of a plurality of sections, each including a plurality of memory cells. A selection signal for selecting one section is generated in accordance with a data writing or reading operation. First and second potentials of high level are generated, and one of the potentials are selectively supplied to pairs of bit lines in one of the plurality of sections. In a data writing operation, the pairs of bit lines are precharged to the first potential, e.g., the supply voltage V.sub.cc, and in a data reading operation, the pair of bit lines is precharged to the second potential, e.g., V.sub.cc -2V.sub.f, where V.sub.f is a forward voltage of a diode.

REFERENCES:
patent: 4947374 (1990-08-01), Wada et al.
patent: 4961168 (1990-10-01), Tran
patent: 4975877 (1990-12-01), Bell
patent: 5222041 (1993-06-01), Nishimori et al.

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