Static memory circuit

Details Static memory circuit Static memory circuit

1983-09-29

1986-10-07

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Precharge

365189, 365230, 365194, G11C 700

Patent

active

046163441

ABSTRACT:
A static memory circuit includes memory cells arranged in a matrix of word lines and bit lines, and a reset circuit for resetting each pair of bit lines to have an equivalent potential in response to a change in a row address signal. The reset circuit generates a reset signal at a first time a certain time period after a first change of the row address signal and terminates the reset signal at a second time when a second change of the row address signal is detected. Thus, data destruction during reading is prevented.

REFERENCES:
patent: 3866061 (1975-02-01), Wen et al.
patent: 4099265 (1976-12-01), Abe
patent: 4355377 (1982-10-01), Sud et al.
patent: 4417328 (1983-11-01), Ochii
patent: 4447892 (1984-05-01), Zibu
patent: 4499559 (1985-02-01), Kurafuji

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