Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-02-06
2007-02-06
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S500000
Reexamination Certificate
active
10438289
ABSTRACT:
A start-detection circuit and a stop-detection circuit detect the start condition and the stop condition in a data signal associated with a clock signal according to the IIC protocol. The start-detection circuit comprises: a first detector to produce a first reset signal when a trailing edge of the data signal is detected; a counter to count pulses of a reference signal when the first reset signal is received, and to produce an enabling signal when the number of pulses counted has reached a predefined number; a second detector to store the enabling signal when a trailing edge of the clock signal is detected. The stop-detection circuit comprises a third detector to produce a stop signal when a leading edge of the data signal is detected after the detection of a leading edge of the clock signal.
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Kari Ahmed
Musumeci Orazio
Cao Chun
Graybeal Jackson Haley LLP
Han J. Mark
Jorgenson Lisa K.
STMicroelectronics S.R.L.
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