Standardized power and ground design for pin grid array packages

Details Standardized power and ground design for pin grid array packages Standardized power and ground design for pin grid array packages

1994-08-31

1996-01-09

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257693, 257678, H01L 2352, H01L 2348, H01L 2302

Patent

active

054830990

ABSTRACT:
An integrated circuit package that is coupled to a printed circuit board by a socket assembly. The socket assembly has a plurality of pins that are mounted to the circuit board. The pins are coupled to corresponding conductive sockets and outer rings of the socket assembly. The package contains an integrated circuit that is coupled to external pins which extend from a bottom surface of the package housing. The package also has a plurality of conductive rings that are located on the bottom surface of the housing and are electrically coupled to the integrated circuit. To install the package, the package pins are inserted into the individual sockets of the socket assembly. Insertion of the pins also presses the conductive rings of the package onto the corresponding outer rings of the socket. The conductive rings are typically dedicated to the power and ground pins of the system, wherein the integrated circuit receives power through the rings. The use of rings reduces the insertion force required to attach the package to the socket.

REFERENCES:
patent: 4381458 (1983-04-01), Anstey et al.
patent: 4631572 (1986-12-01), Zimmerman
patent: 4954877 (1990-09-01), Nakanishi et al.
patent: 4972253 (1990-11-01), Palino et al.
patent: 5309024 (1994-05-01), Hirano

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