Stacked structure for parallel capacitors and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S532000

Reexamination Certificate

active

06838717

ABSTRACT:
A monolithic integrated circuit including a capacitor structure. In one embodiment the integrated circuit includes at least first and second levels of interconnect conductor for connection to a semiconductor layer and a stack of alternating conductive and insulative layers formed in vertical alignment with respect to an underlying plane. The stack is formed between the first and second levels of conductor. Preferably the stack includes a first conductive layer, a first insulator layer formed over the first conductive layer, a second conductive layer formed over the first insulative layer, a second insulator layer formed over the second conductive layer, and a third conductive layer formed over the second insulative layer, with the first and third conductive layers commonly connected.

REFERENCES:
patent: 3962713 (1976-06-01), Kendall et al.
patent: 5481490 (1996-01-01), Watanabe et al.
patent: 5643804 (1997-07-01), Arai et al.
patent: 5736448 (1998-04-01), Saia et al.
patent: 6180976 (2001-01-01), Roy

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