Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-06-28
2011-10-18
Ghyka, Alexander (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S278000, C257S774000, C257SE23145, C438S675000, C438S155000
Reexamination Certificate
active
08039900
ABSTRACT:
The stacked semiconductor device includes a semiconductor substrate, a multi-layered insulation layer pattern having at least two insulation layer patterns and an opening, an active layer pattern formed on each of the insulation layer patterns, a first plug including single crystalline silicon-germanium, a second plug including single crystalline silicon, and a wiring electrically connected to the first plug and sufficiently filling up the opening. The insulation layer patterns are vertically stacked on the semiconductor substrate and the opening exposes an upper face of the semiconductor substrate. A side portion of the active layer pattern is exposed by the opening. The first plug is formed on the upper face of the semiconductor substrate to partially fill the opening. The second plug is partially formed on the first plug, and has substantially the same interface as that of the first plug.
REFERENCES:
patent: 5374572 (1994-12-01), Roth et al.
patent: 6429484 (2002-08-01), Yu
patent: 6670682 (2003-12-01), Mouli
patent: 2005/0151276 (2005-07-01), Jang et al.
patent: 2005/0179061 (2005-08-01), Jang et al.
patent: 2005/0248035 (2005-11-01), Son et al.
patent: 2005/0277235 (2005-12-01), Son et al.
patent: 2006/0292880 (2006-12-01), Son et al.
patent: 2007/0007532 (2007-01-01), Kang et al.
patent: 2007/0048913 (2007-03-01), Son et al.
patent: 1020040025967 (2004-03-01), None
patent: 1020040059805 (2004-07-01), None
patent: 10-2005-0073948 (2005-07-01), None
patent: 10-2005-0073956 (2005-07-01), None
patent: 10-0519801 (2005-09-01), None
patent: 10-0655664 (2006-12-01), None
patent: 100655664 (2006-12-01), None
Wolf, “Silicon Processing for the VLSI Era, vol. 2.” 1990, Lattice Press, pp. 62.
Kang Sung-Kwan
Kim Kyoung-Seok
Lee Ko-Eun
Lee Kong-Soo
Park Sang-Jin
Chang Leonard
Ghyka Alexander
Onello & Mello LLP
Samsung Electronics Co,. Ltd.
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