Stacked memory device having shared bitlines and method of...

Details Stacked memory device having shared bitlines and method of... Stacked memory device having shared bitlines and method of...

2005-08-02

2005-08-02

Tran, Michael (Department: 2827)

Static information storage and retrieval

Read/write circuit

Multiplexing

C257S295000

Reexamination Certificate

active

06925015

ABSTRACT:
Briefly, in accordance with one embodiment of the invention, a system includes a memory array. The memory array comprises a first layer of memory cells overlying a second layer of memory cells and bit lined coupled to at least one memory cell in the first layer of memory cells and to at least one memory cell in the second layer of memory cell.

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