Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2008-11-06
2010-06-01
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S106000, C438S637000, C257SE21170, C257SE21249, C257SE21304, C257SE21499, C257SE21511, C257SE21585
Reexamination Certificate
active
07727896
ABSTRACT:
A method for forming a stacked-die structure is disclosed in which a buried oxide layer is formed in a semiconductor wafer. Device layers and metal layers are formed on the face side of the semiconductor wafer, defining dice, with each die including an interconnect region. Openings are etched in the interconnect regions that extend through the semiconductor wafer so as to expose portions of the buried oxide layer. Conductive material is deposited within the openings so as to form through-die vias. The semiconductor wafer is then attached to a wafer support structure and material is removed from the backside of the semiconductor wafer so as to form an oxide layer having a thickness that is less than the initial thickness of the buried oxide layer. Openings are then etched within the backside of the semiconductor wafer so as to expose the through-die vias, micro-bumps are deposited over the through-die vias, and stacked dice are attached to the micro-bumps so as to electrically couple the stacked dice to the through-die vias. Thereby, a stacked die structure is formed that includes an oxide layer on the backside of the base die. Since the method does not include any high temperature process steps after the semiconductor wafer has been attached to the wafer support structure, thermally-released double-sided tape or adhesive having a low thermal budget can be used to attach the semiconductor wafer to the wafer support structure.
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patent: 2009/0224400 (2009-09-01), Rahman
George Thomas
Glass Kenneth
Nhu David
Xilinx , Inc.
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