Stacked chip package structure with leadframe having inner...

Details Stacked chip package structure with leadframe having inner... Stacked chip package structure with leadframe having inner...

2007-07-16

2010-10-19

Parekh, Nitin (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C257S777000, C257SE23049

Reexamination Certificate

active

07816771

ABSTRACT:
The present invention provides a stacked chip package structure with leadframe having inner leads with transfer pad, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provided between the plurality of inner leads arranged in rows facing each other and vertically distant from the plurality of inner leads; an offset chip-stacked structure formed with a plurality of chips stacked together, the offset chip-stacked structure being set on the die pad and electrically connected to the plurality of inner leads arranged in rows facing each other; and an encapsulant covering the offset chip-stacked structure and the leadframe, the plurality of outer leads extending out of said encapsulant; the improvement of which being that the inner leads of the leadframe are coated with an insulating layer and a plurality of metal pads are selectively formed on the insulating layer.

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