Semiconductor device manufacturing: process – Semiconductor substrate dicing
Reexamination Certificate
2006-10-03
2006-10-03
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
C438S033000, C438S068000, C438S113000, C438S114000, C438S458000, C438S617000, C257S686000
Reexamination Certificate
active
07115483
ABSTRACT:
A stacked chip package includes a substrate having an upper surface and a lower surface, a first semiconductor chip having an upper surface and a lower surface, wherein the lower surface of the first semiconductor chip is attached to the upper surface of the substrate and the upper surface of the first semiconductor chip includes a plurality of first electrode pads, and a second semiconductor chip having an upper surface and a lower surface. The lower surface of the second semiconductor chip is attached to the upper surface of the first semiconductor chip, and the lower surface of the second semiconductor chip includes trenches that correspond to the locations of the first electrode pads on the upper surface of the first semiconductor chip.
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Kang Sa Yoon
Kwon Yong Hwan
Oh Se Yong
Harness & Dickey & Pierce P.L.C.
Jr. Carl Whitehead
Mitchell James M.
Samsung Electronics Co,. Ltd.
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