SRAM with temperature-dependent voltage control in sleep mode

Details SRAM with temperature-dependent voltage control in sleep mode SRAM with temperature-dependent voltage control in sleep mode

2006-01-03

2006-01-03

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S229000, C323S315000, C323S316000, C327S512000, C327S513000

Reexamination Certificate

active

06982915

ABSTRACT:
An electronic device (10), comprising a plurality of data storage cells (12), collectively operable in a data access mode and separately in a sleep mode. The sleep mode comprises a period of time during which the plurality of data cells are not accessed and during which a data state stored in each cell in the plurality of data cells is to be maintained at a valid state. The electronic device further comprises circuitry (18′) for providing at least one temperature-dependent voltage to at least one storage device in each cell in the plurality of data storage cells during the sleep mode.

REFERENCES:
patent: 5563502 (1996-10-01), Akioka et al.
patent: 6856566 (2005-02-01), Takahashi et al.
patent: 6933769 (2005-08-01), Koelling

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