Active solid-state devices (e.g. – transistors – solid-state diode – Fet configuration adapted for use as static memory cell
Reexamination Certificate
1998-11-20
2001-03-06
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Fet configuration adapted for use as static memory cell
C257S344000, C257S408000
Reexamination Certificate
active
06198173
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor memory devices and more particularly to a method of manufacturing Static Random Access Memory (SRAM) devices cell with an enhanced Beta ratio and improved cell stability.
2. Description of Related Art
U.S. Pat. No. 5,395,773 of Ravindhran shows a method of forming a gate penetrating halo implant.
U.S. Pat. No. 5,595,919 of Pan shows another self-aligned halo method.
U.S. Pat. No. 5,534,447 of Hong, U.S. Pat. No. 5,504,023 of Hong, U.S. Pat. No. 5,492,847 of Kao all show halo self-aligned methods. However, these references do not teach the B-implant halo process of the invention.
SUMMARY OF THE INVENTION
Beta Ratio
Processing of a polysilicon load SRAM is easy and the cell is the smallest in size, which are both factors which reduce manufacturing cost. But the problem is to to produce an SRAM device which has a high enough Beta ratio (&bgr;=I
pull-down
/I
pass-gate
) within finite dimensions in the deep-submicron regime. Using conventional approaches, the yield obtained is too marginal. The Beta ratio is generally about 3.5 to achieve better cell stability.
The pass-gate transistor of an SRAM cell is implemented by an extra implant of dopant, such as boron (B
11
), to form a halo structure.
This invention increases the Beta ratio in an SRAM cell to obtain high cell operation stability. It makes it possible to reduce the channel length of the pass-gate transistors without impacting the Beta ratio to obtain a smaller cell size or increase the width of pull-down transistor to obtain a wider field isolation process (such as a LOCOS) window. It also makes it possible to suppress the I
off
current of a pass-gate transistor. The present invention shows a method of implanting boron to form a halo structure in a pass-gate transistor of an SRAM cell.
REFERENCES:
patent: 5395773 (1995-03-01), Ravindhran et al.
patent: 5492847 (1996-02-01), Rao et al.
patent: 5504023 (1996-04-01), Hong
patent: 5534447 (1996-07-01), Hong
patent: 5595919 (1997-01-01), Pan
patent: 5656861 (1997-08-01), Godinho et al.
patent: 5847434 (1998-12-01), Onozawa
patent: 5880496 (1999-03-01), Chen et al.
patent: 5955746 (1999-09-01), Kim
Ackerman Stephen B.
Jones II Graham S.
Loke Steven
Saile George O.
Taiwan Semiconductor Manufacturing Company
LandOfFree
SRAM with improved Beta ratio does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with SRAM with improved Beta ratio, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SRAM with improved Beta ratio will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2511098