SRAM cell employing substantially vertically elongated pull-up r

Details SRAM cell employing substantially vertically elongated pull-up r SRAM cell employing substantially vertically elongated pull-up r

1997-07-29

1999-11-09

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438381, 438639, H01L 218234

Patent

active

059813296

ABSTRACT:
A method of forming an SRAM cell includes, a) providing a pair of pull-down gates having associated transistor diffusion regions operatively adjacent thereto, one of the diffusion regions of each pull-down gate being electrically connected to the other pull-down gate; b) providing a pair of pull-up resistor nodes for electrical connection with a pair of respective pull-up resistors, the pull-up nodes being in respective electrical connection with one of the pull-down gate diffusion regions and the other pull-down gate; c) providing a first electrical insulating layer outwardly of the resistor nodes; d) providing a pair of contact openings, with respective widths, through the first insulating layer to the pair of resistor nodes; e) providing a second electrical insulating layer over the first layer and to within the pair of contact openings to a thickness which is less than one-half the open widths; f) anisotropically etching the second electrical insulating layer to define respective electrical insulating annulus spacers received within the respective pair of contact openings and a pair of elongated pull-up resistor openings laterally inward thereof; g) providing electrically conductive material within the pair of elongated pull-up resistor openings in electrical connection with the pair of pull-up resistor nodes to define the pull-up resistors; and h) providing a Vcc line in electrical connection with the pull-up resistors. SRAM circuitry produced according to the above method and by other methods are also contemplated.

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