Spread spectrum clock generation

Details Spread spectrum clock generation Spread spectrum clock generation

2007-05-15

2011-10-11

Elamin, M (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

C713S400000, C713S500000, C713S501000, C713S502000, C713S503000, C713S600000, C713S601000, C327S147000, C327S150000, C327S156000

Reexamination Certificate

active

08037336

ABSTRACT:
The present disclosure provides a spread spectrum clock generation system having a digitally controlled phase locked loop (PLL) and a digital frequency profile generator to create a near optimal frequency modulation profile for the purpose of achieving spectral flatness in the output frequency modulated clock. The circuit is combined with a multilevel error feedback noise shaping structure that provides the required noise transfer function for the quantization noise but maintains a unity gain all pass signal transfer function. This arrangement offers minimal degradation of the in-band signal-to-noise ratio (SNR) at the cost of higher out-of-band noise.

REFERENCES:
patent: 5608354 (1997-03-01), Hori
patent: 5907483 (1999-05-01), Iio et al.
patent: 2006/0290391 (2006-12-01), Leung et al.
patent: 2007/0019711 (2007-01-01), Mallinson et al.

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