Spilt-gate flash memory structure and method of manufacture

Details Spilt-gate flash memory structure and method of manufacture Spilt-gate flash memory structure and method of manufacture

2005-03-15

2005-03-15

Chaudhuri, Oiik (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06867099

ABSTRACT:
A split-gate flash memory structure. The flash memory at least includes a substrate having a trench therein, a floating gate, a select gate and a source/drain region. The floating gate is formed inside the trench such that the upper surface of the floating gate is below the substrate surface. The select gate is also formed inside the trench above the floating gate such that the select gate protrudes beyond the substrate surface. The source/drain region is formed in the substrate on each side of the select gate. The source/drain region and the floating gate are separated from each other by a distance. A tunnel oxide layer separates the floating gate from the substrate and a gate dielectric layer separates the floating gate from the select gate. A dielectric layer separates the select gate from the substrate.

REFERENCES:
patent: 5392237 (1995-02-01), Iida
patent: 5429970 (1995-07-01), Hong
patent: 5773343 (1998-06-01), Lee et al.
patent: 6391719 (2002-05-01), Lin et al.

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