Source lines for NAND memory devices

Details Source lines for NAND memory devices Source lines for NAND memory devices

2007-04-10

2007-04-10

Kebede, Brook (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21690

Reexamination Certificate

active

11247043

ABSTRACT:
A source line is formed by forming a source slot in a bulk insulation layer overlying a substrate to expose a portion of a substrate within the source slot, where the exposed portion of the substrate includes source regions of select gates associated with two or more columns of serially-connected floating-gate transistors formed on the substrate. A layer of epitaxial silicon is grown on the exposed portion so as to partially fill the source slot. A conductive layer is formed on the bulk insulation layer and on the layer of epitaxial silicon so as to substantially fill an unfilled portion of the source slot. The conductive layer is removed from a surface of the bulk insulation layer.

REFERENCES:
patent: 6515329 (2003-02-01), Lee
patent: 6762093 (2004-07-01), Rudeck
patent: 7115509 (2006-10-01), Chen et al.
patent: 2003/0080374 (2003-05-01), Arai

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