Source lines for NAND memory devices

Details Source lines for NAND memory devices Source lines for NAND memory devices

2006-09-26

2006-09-26

Kebede, Brook (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21690

Reexamination Certificate

active

07112488

ABSTRACT:
Methods and apparatus are provided. A NAND memory device has a source line connected to two or more columns of serially-connected floating-gate transistors. The source line includes a first conductive layer formed on a substrate and coupled to source select gates associated with the two or more columns of serially-connected floating-gate transistors. The source line also includes a second conductive layer formed on the first conductive layer, where the second layer has a greater electrical conductivity than the first conductive layer.

REFERENCES:
patent: 6383878 (2002-05-01), Huang
patent: 6387745 (2002-05-01), Onoda et al.
patent: 6515329 (2003-02-01), Lee et al.
patent: 2003/0080374 (2003-05-01), Arai

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