Solid state memory device capable of providing data signals on 2

Details Solid state memory device capable of providing data signals on 2 Solid state memory device capable of providing data signals on 2

1993-11-10

1994-12-13

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Multiplexing

36523030, 36523002, 395325, G11B 700, G06F 1340

Patent

active

053734670

ABSTRACT:
A solid state peripheral storage device in compliance with the PCMCIA standard provides data signals on either 16 data signal lines or 8 data signal lines. The device has a plurality of even number of substantially identical memory integrated circuit chips divided into two groups. Each of the memory integrated circuit chips provides 8 data signal lines divided into two groups of 4 data signal lines. One of the group of 4 data signal lines from one of the group of memory chips is grouped with one of the 4 data signal lines from the other group of memory chips to form a first group of 8 contiguous bus of data signal lines. The other group of 4 data signal lines from one group of memory chips is also collected with 4 data signal lines from the other group of memory chips to form a second group of 8 contiguous data signal lines. The two groups of 8 contiguous data signal lines are grouped together to form the bus of 16 data signal lines.

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