Solder wall structure in flip-chip technologies

Details Solder wall structure in flip-chip technologies Solder wall structure in flip-chip technologies

2006-02-01

2009-06-16

Richards, N Drew (Department: 2822)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S106000, C438S117000, C438S121000, C257SE23002

Reexamination Certificate

active

07547576

ABSTRACT:
A structure and method for forming the same. The semiconductor structure includes a first semiconductor chip and N solder bumps in direct physical contact with the first semiconductor chip, wherein N is a positive integer. The semiconductor structure also includes a first solder wall on a perimeter of the first semiconductor chip such that the first solder wall forms a closed loop surrounding the N solder bumps.

REFERENCES:
patent: 5821161 (1998-10-01), Covell, II et al.
patent: 5881944 (1999-03-01), Edwards et al.
patent: 5904499 (1999-05-01), Pace
patent: 5982038 (1999-11-01), Toy et al.
patent: 6046074 (2000-04-01), McHerron et al.
patent: 6165820 (2000-12-01), Pace
patent: 6238951 (2001-05-01), Caillat
patent: 6376915 (2002-04-01), Hikita et al.
patent: 6404040 (2002-06-01), Hikita et al.
patent: 6808955 (2004-10-01), Ma
patent: 6956291 (2005-10-01), Li
patent: 7141869 (2006-11-01), Kim et al.

Affiliated with

Also associated with

Rating

Solder wall structure in flip-chip technologies does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Solder wall structure in flip-chip technologies, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solder wall structure in flip-chip technologies will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4107932