Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2004-01-29
2008-11-18
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000
Reexamination Certificate
active
07452797
ABSTRACT:
The present invention provides a solder deposition method that includes the step of forming a dam around an electrode on a substrate, the step of applying a solder precipitating composition to the substrate, and the step of depositing solder on the surface of the electrode while heating the solder precipitating composition applied. This solder deposition method is suitable for forming large bumps at fine pitches. In particular, it is capable of depositing solder in a desired height precisely and easily, and yet preventing occurrence of voids.
REFERENCES:
patent: 5024372 (1991-06-01), Altman et al.
patent: 5056215 (1991-10-01), Blanton
patent: 5738269 (1998-04-01), Masterton
patent: 6408511 (2002-06-01), Branchevsky
patent: 6461953 (2002-10-01), Sakuyama et al.
patent: 6524943 (2003-02-01), Sakuyama
patent: 6586322 (2003-07-01), Chiu et al.
patent: 6709898 (2004-03-01), Ma et al.
patent: 6784087 (2004-08-01), Lee et al.
patent: 6881278 (2005-04-01), Amita et al.
patent: 6921860 (2005-07-01), Peterson et al.
patent: 6923875 (2005-08-01), Ikeda et al.
patent: 7119000 (2006-10-01), Shimizu et al.
patent: 7291517 (2007-11-01), Sakurai et al.
patent: 2002/0046627 (2002-04-01), Amita et al.
patent: 2004/0011855 (2004-01-01), Nakamura et al.
patent: 05-235003 (1993-09-01), None
patent: 06-183165 (1994-07-01), None
patent: 09-148333 (1997-06-01), None
patent: 09-181429 (1997-07-01), None
patent: 10-163211 (1998-06-01), None
patent: 10-242649 (1998-09-01), None
patent: 11-191673 (1999-07-01), None
patent: 2000-049182 (2000-02-01), None
patent: 1-157796 (2001-06-01), None
patent: 2002-141367 (2002-05-01), None
patent: 2002-334895 (2002-11-01), None
patent: 2002-353272 (2002-12-01), None
patent: WO 00/10369 (2000-02-01), None
Patent Abstract of Japan “Method for forming bump” Publication No. 2002-334895, Sakuyama Seiki (Nov. 22, 2002), translation.
Patent Abstract of Japan “Method for forming bump” Publication No. 2002-334895, Sakuyama Seiki (Nov. 22, 2002), English translation.
Office Action from Japanese Patent Office dated May 2, 2006.
Seiki Sakuyama, “Solder Bumping Technology for Wafer-scale Packaging”, 7thSymposium on “Microjoining and Assembly Technology in Electronics”, Feb. 1-2, 2001, pp. 285-290.
Kukimoto Youichi
Kumamoto Seishi
Oyama Kenshu
Sakurai Hitoshi
Coleman W. David
Harima Chemicals Inc.
Nguyen Khiem D
Sughrue & Mion, PLLC
LandOfFree
Solder deposition method and solder bump forming method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Solder deposition method and solder bump forming method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solder deposition method and solder bump forming method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4032672