Solder bump fabrication methods and structure including a titani

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438612, H01L 2144

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active

057670102

ABSTRACT:
A method for fabricating solder bumps on a microelectronic device having contact pads includes the steps of depositing a titanium barrier layer on the device, forming an under bump metallurgy layer on the titanium barrier layer, and forming one or more solder bumps on the under bump metallurgy layer. The solder bump or bumps define exposed portions of the under bump metallurgy layer which are removed, and then the exposed portion of the titanium barrier layer is removed. The titanium barrier layer protects the underlying microelectronic device from the etchants used to remove the under bump metallurgy layer. The titanium layer also prevents the under bump metallurgy layer from forming a residue on the underlying microelectronic device. Accordingly, the titanium barrier layer allows the under bump metallurgy layer to be quickly removed without leaving residual matter thereby reducing the possibility of electrical shorts between solder bumps.

REFERENCES:
patent: 3663184 (1972-05-01), Wood et al.
patent: 3839727 (1974-10-01), Herdzik et al.
patent: 4042954 (1977-08-01), Harris
patent: 4237607 (1980-12-01), Ohno
patent: 4273859 (1981-06-01), Mones et al.
patent: 4293637 (1981-10-01), Hatada et al.
patent: 4513905 (1985-04-01), Nowicki et al.
patent: 4661375 (1987-04-01), Thomas
patent: 4840302 (1989-06-01), Gardner et al.
patent: 4950623 (1990-08-01), Dishon
patent: 5108950 (1992-04-01), Wakabayashi et al.
patent: 5130779 (1992-07-01), Agarwala et al.
patent: 5134460 (1992-07-01), Brady et al.
patent: 5162257 (1992-11-01), Yung
patent: 5234149 (1993-08-01), Katz et al.
patent: 5268072 (1993-12-01), Agarwala et al.
patent: 5272111 (1993-12-01), Kosaki
patent: 5277756 (1994-01-01), Dion
patent: 5289631 (1994-03-01), Koopman et al.
patent: 5293006 (1994-03-01), Yung
patent: 5296407 (1994-03-01), Eguchi
patent: 5298459 (1994-03-01), Arikawa et al.
patent: 5391521 (1995-02-01), Kim
patent: 5440167 (1995-08-01), Iranmanesh
patent: 5459087 (1995-10-01), Mochizuki
patent: 5470787 (1995-11-01), Greer
patent: 5498573 (1996-03-01), Whetten
Yung et al., Electroplated Solder Joints for Flip-Chip Applications, Trans. on Components, Hybrids, and Manufacturing Technology 14:549, No. 3 (1991).
Yung et al., FLip-Chip Process Utilizing Electroplated Solder Joints, Proceedings of the Technical Conference, p. 1065 (1990).
Castrucci et al., Terminal Metallurgy System for Semiconductor Devices, IBM Technical Disclosure Bulletin, 9:1805, No. 12 (May 1967).
Tessier et al., Process Considerations in Fabricating Thin Film Multichip Modules, Proceedings of the Technical Conference, 1:294 (Sep. 1989).

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