Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2008-01-22
2008-01-22
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C257SE21561
Reexamination Certificate
active
10858646
ABSTRACT:
A method is for commercially producing by the SIMOX technique a perfect partial SOI structure avoiding exposure of a buried oxide film through the surface thereof and forming no step between an SOI region and a non-SOI region.A method for the production of an SOI substrate, includes forming on the surface of a semiconductor substrate made of a silicon single crystal a protective film designated to serve as a mask for ion implantation, forming an opening part of a stated pattern in the protective film, implanting oxygen ions into the surface of the semiconductor substrate in a direction not perpendicular thereto, and heat treating the semiconductor substrate thereby forming a buried oxide film in the semiconductor substrate, and inducing at the step of implanting oxygen ions into the surface of the semiconductor substrate the impartation of at least two angles to be formed between the projection of the flux of implantation of oxygen ions and a specific azimuth of the main body of the substrate.
REFERENCES:
patent: 5346841 (1994-09-01), Yajima
patent: 5399507 (1995-03-01), Sun
patent: 5488004 (1996-01-01), Yang
patent: 5753923 (1998-05-01), Mera et al.
patent: 6548369 (2003-04-01), Van Bentum
patent: 6767801 (2004-07-01), Kawamura et al.
patent: 2004/0171228 (2004-09-01), Matsumura et al.
patent: 2004/0224477 (2004-11-01), Erokhin et al.
patent: 8-176694 (1996-01-01), None
patent: 02218159 (2000-11-01), None
patent: 2001308025 (2002-04-01), None
patent: 505 993 (2002-10-01), None
patent: 00/48245 (2000-08-01), None
Patent Abstract of Japan Corresponding to JP2001-308025.
Patent Abstract of Japan Corresponding to JP2001-308172.
Matsumura Atsuki
Sasaki Tsutomu
Takayama Seiji
Booth Richard A.
Brooks & Kushman P.C.
Siltronic AG
LandOfFree
SOI substrate, semiconductor substrate, and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with SOI substrate, semiconductor substrate, and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SOI substrate, semiconductor substrate, and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3949992