Soft error tolerance for configuration memory in...

Details Soft error tolerance for configuration memory in... Soft error tolerance for configuration memory in...

2006-01-27

2008-03-04

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000

Reexamination Certificate

active

07339816

ABSTRACT:
A memory device provides improved tolerance against soft errors. A guardian memory cell is connected with a single memory cell or multiple memory cells, which may be unrelated or associated with a single programmable device component. When a guardian cell stores a first guardian value, the connected memory cells are held to a first bit value. When a guardian cell stores a second value, each of the connected memory cells can store either the first bit value or a second bit value. The guardian cell is adapted to activate a pull-down or pull-up transistor of each connected memory cell to hold the connected memory cells to the first bit value. The first bit value is selected to maximize the number of memory cells protected by guardian cells.

REFERENCES:
patent: 6876572 (2005-04-01), Turner
patent: 2003/0097628 (2003-05-01), Ngo et al.
patent: 2007/0109017 (2007-05-01), Liu et al.

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