Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2006-08-08
2006-08-08
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S401000, C713S500000, C713S502000, C713S503000, C714S699000, C714S700000, C714S704000, C714S706000, C386S349000, C386S349000, C386S349000, C327S149000, C327S153000, C327S158000, C327S276000, C370S517000, C370S519000
Reexamination Certificate
active
07089440
ABSTRACT:
A data processing system includes first, second, and third agents connected to a shared bus. The third agent is able to receive information via the shared bus from the first agent or from the second agent. The third agent includes a skew compensation circuit to determine signal skew in signal received via the shared bus and to compensate for the skew by adding delay into selected signals of the bus. The skew compensation circuit determines whether the first agent or the second agent is the sender of information received by the third agent via the shared bus. The skew compensation circuit alters the skew compensation based on the identity of the sender such that the delay into the bus signals is specific to the corresponding sender.
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Byrd Cynthia S.
International Business Machines - Corporation
Lally Joseph P.
Patel Nitin C.
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