Single port register

Details Single port register Single port register

1995-02-03

1996-04-30

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523008, G11C 700

Patent

active

055131417

ABSTRACT:
A novel mad/write control register uses the same bus port for reading and writing, while requiting only one unique control line. The technique may be implemented as a "D" type level sense latch. The write operation is similar to standard latch operation: the transmission gate on the D input is turned on while the feedback transmission gate is off. However, for read operation, both transmission gates are enabled, thereby allowing the register output value to drive the bus. A preset or clear capability may optionally be provided. This approach reduces the size of the register as compared to standard read/write registers, and requires only one unique control line versus two, thus reducing decoding logic and routing. Since only one port to the bus is required, the bus load gate capacitance is typically one-half that of the standard approach.

REFERENCES:
patent: 5361229 (1994-11-01), Chiang et al.
patent: 5388074 (1995-02-01), Buckenmaier

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