Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-06-14
2005-06-14
Pham, Hoai (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S317000, C438S318000, C438S319000
Reexamination Certificate
active
06905929
ABSTRACT:
Leakage of a single-poly EPROM cell is prevented by eliminating field oxide isolating the source, channel, and drain from the control gate n-well, and by replacing field oxide surrounding the cell with a heavily doped surface isolation region. The EPROM cell also utilizes a floating gate having an open-rectangular floating gate portion over the control gate region, and a narrow floating gate portion over the channel and intervening silicon substrate. The surface area of the open-rectangular floating gate portion ensures a high coupling ratio with the control gate region. The small width of the narrow floating gate portion prevents formation of a sizeable leakage path between the n-well and the source, channel, and drain. To conserve surface area, the EPROM cell also eliminates the p+ contact region and the PLDD region in the control gate well of the conventional EPROM design. This is permitted because the VTpimplant step is masked, permitting the control gate region to operate in accumulation mode during application of 5V programming voltages.
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Bergemont Albert
Chi Min-hwa
Merrill Richard B.
Ha Nathan W.
National Semiconductor Corporation
Stallman & Pollock LLP
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