Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-03-20
2007-03-20
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
10907006
ABSTRACT:
The single-poly EEPROM includes a first PMOS transistor serially connected to a second PMOS transistor. The first and second PMOS transistors are both formed on an N-well of a P type substrate. The first PMOS transistor includes a floating gate, a first P+doped drain region and a first P+doped source region. The second PMOS transistor includes a gate and a second P+doped source region. The first P+doped drain region of the first PMOS transistor serves as a drain of the second PMOS transistor. A diode is located in the P type substrate including a P-well and a N+doped region. The floating gate overlaps with the N-well and extends to the N+doped region. The overlapped region of the P-well and the N+doped region junction beneath the floating gate serves as an avalanche injection point in the vicinity of the first PMOS transistor.
REFERENCES:
patent: 5719427 (1998-02-01), Tong et al.
patent: 6711064 (2004-03-01), Hsu et al.
patent: 536818 (2003-06-01), None
Huang Shui-Chin
Lee Tzyh-Cheang
Lin Sung-Bin
Peng Nai-Chen
Wang Chuan Fu
Harrison Monica D.
Hsu Winston
Jr. Carl Whitehead
United Microelectronics Corp.
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