Single mask MIM capacitor and resistor with in trench copper...

Details Single mask MIM capacitor and resistor with in trench copper... Single mask MIM capacitor and resistor with in trench copper...

2007-03-13

2007-03-13

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S200000, C438S201000

Reexamination Certificate

active

11037530

ABSTRACT:
The formation of a MIM (metal insulator metal) capacitor (164) and concurrent formation of a resistor (166) is disclosed. A copper diffusion barrier (124) is formed over a copper deposition (110) that serves as a bottom electrode (170) of the capacitor (164). The copper diffusion barrier (124) mitigates unwanted diffusion of copper from the copper deposition (110), and is formed via electro-less deposition such that little to none of the barrier material is deposited at locations other than over a top surface (125) of the deposition of copper/bottom electrode. Subsequently, layers of dielectric (150) and conductive (152) materials are applied to form a dielectric (172) and top electrode (174) of the MIM capacitor (164), respectively, where the layer of conductive top electrode material (152) also functions to concurrently develop the resistor (166) on the same chip as the capacitor (164).

REFERENCES:
patent: 6451664 (2002-09-01), Barth et al.
patent: 6555171 (2003-04-01), Lopatin
patent: 6838352 (2005-01-01), Zhao
patent: 6908802 (2005-06-01), Ramesh

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