Single-ended transmission for direct access test mode within...

Details Single-ended transmission for direct access test mode within... Single-ended transmission for direct access test mode within...

2007-03-27

2007-03-27

Kerveros, James C (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S724000

Reexamination Certificate

active

10839635

ABSTRACT:
An integrated circuit, among other embodiments, includes an output circuit to provide a differential signal on first and second contacts during a first mode of operation, such as in a read or write mode of operation, and a single-ended signal on the first contact during a second mode of operation, such as a test mode of operation. A first variable resistor, responsive to a first control signal, is coupled to a first voltage source and the first contact. A second variable resistor, responsive to a second control signal, is coupled to a second voltage source and the second contact. A first transistor has a first electrode coupled to the first contact, a second electrode coupled to the current source and a gate to receive a first input signal. A second transistor has a first electrode coupled to the second contact, a second electrode coupled to the current source and a gate to receive a second input signal.

REFERENCES:
patent: 6683472 (2004-01-01), Best et al.
patent: 6985005 (2006-01-01), Kim et al.
patent: 7010637 (2006-03-01), To et al.
patent: 2002/0170011 (2002-11-01), Lai et al.
patent: 2005/0193302 (2005-09-01), Arguelles et al.

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