Single-ended sensing using global bit lines for dram

Static information storage and retrieval – Read/write circuit – Precharge

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365149, G11C 700

Patent

active

056847491

ABSTRACT:
An integrated circuit dynamic memory device is described which stores data in memory cells as a charge on a capacitor. The memory cells can be selectively connected to a digit line. Sensing circuitry, including both p-sense and n-sense amplifiers, is connected to the digit line for sensing data stored in the memory cells. Equalization circuitry is described to equalize the sense amplifiers by connecting both nodes of the sense amplifiers to the digit line prior to sensing data stored on the memory cell.

REFERENCES:
patent: 4715015 (1987-12-01), Mimoto et al.
patent: 5241503 (1993-08-01), Cheng
patent: 5309392 (1994-05-01), Ootsuka
patent: 5367481 (1994-11-01), Takase et al.

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