Simultaneous formation of deep trench capacitor and resistor

Details Simultaneous formation of deep trench capacitor and resistor Simultaneous formation of deep trench capacitor and resistor

2001-12-12

2003-03-04

Cuneo, Kamand (Department: 2829)

Semiconductor device manufacturing: process

Making passive device

C438S382000, C438S386000

Reexamination Certificate

active

06528383

ABSTRACT:

FIELD OF THE INVENTION
The field of the invention is integrated circuit processing, including circuits having resistors.
BACKGROUND OF THE INVENTION
When a circuit requires a resistor, conventional processing uses a strip of polysilicon or an implanted area in the substrate, the dimensions and amount of doping being set to give the desired resistance. Both these approaches are planar and require substantial chip area, as well as additional processing steps to give a resistivity that is different from the resistivity of poly interconnect or sources and drains.
As IC dimensions shrink, the extra area required for a planar resistor becomes more of a burden.
SUMMARY OF THE INVENTION
The invention relates to a method of forming vertical resistors that employs steps that are used for forming a deep trench capacitor in a DRAM.
A feature of the invention is the use of a germanium liner in a deep trench that can be selectively removed to isolate a vertical resistive element placed in the trench from the substrate, while still making ohmic contact with the substrate at the bottom of the trench.


REFERENCES:
patent: 5554870 (1996-09-01), Fitch et al.
patent: 6093968 (2000-07-01), Honeycutt et al.
Oehriein, et al., “Interactive Effects in the Reactive Ion Etching of SiGe-Alloys”, IBM Research Report, RC 16529, Feb. 11, 1991.
Carns, et al., “Chemical Etching of Si(1-x)Ge(x) in HF:H2O2:CH3COOH”, J. Electrochem. Soc., vol. 142, No. 4, Apr. 1995, p 1260-1266.
Li, et al., “Germanium as a Versatile Material for Low-Temperature Micromachining”, Journal of Microelectromechanical Systems, vol. 8, No. 4, Dec. 1999, p 366-372.

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