Simulation of integrated circuitry within a high-level...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000, C716S030000, C716S030000, C703S016000

Reexamination Certificate

active

10388692

ABSTRACT:
Method, apparatus, and computer readable medium for simulating an integrated circuit within a modeling system using one or more circuit description language representations of circuitry is described. By example, a circuit description language representation of the one or more circuit description language representations of circuitry is translated into a program language circuit description. A first simulation process is executed and input data is obtained therefrom. A second simulation process is executed with the input data as parametric input to produce output data, the second simulation process being derived from the program language circuit description. The output data produce by the second simulation process is provided to the first simulation process.

REFERENCES:
patent: 5111413 (1992-05-01), Lazansky et al.
patent: 5437037 (1995-07-01), Furuichi
patent: 5603015 (1997-02-01), Kurosawa et al.
patent: 5903475 (1999-05-01), Gupte et al.
patent: 5946472 (1999-08-01), Graves et al.
patent: 6053947 (2000-04-01), Parson
patent: 6099577 (2000-08-01), Isobe
patent: 6152612 (2000-11-01), Liao et al.
patent: 6175946 (2001-01-01), Ly et al.
patent: 6233540 (2001-05-01), Schaumont et al.
patent: 6360192 (2002-03-01), Dearth et al.
patent: 6421634 (2002-07-01), Dearth et al.
patent: 6470478 (2002-10-01), Bargh et al.
patent: 6571373 (2003-05-01), Devins et al.
patent: 6587995 (2003-07-01), Duboc et al.
patent: 6606588 (2003-08-01), Schaumont et al.
patent: 6606734 (2003-08-01), Greaves
patent: 6691301 (2004-02-01), Bowen
patent: 6701501 (2004-03-01), Waters et al.
patent: 6701515 (2004-03-01), Wilson et al.
patent: 6704891 (2004-03-01), Woo et al.
patent: 6816828 (2004-11-01), Ikegami
patent: 6978231 (2005-12-01), Williams et al.
patent: 6993469 (2006-01-01), Bortfeld
patent: 6996799 (2006-02-01), Cismas et al.
patent: 7006960 (2006-02-01), Schaumont et al.
patent: 7007249 (2006-02-01), Ly et al.
patent: 7035781 (2006-04-01), Flake et al.
patent: 7036106 (2006-04-01), Wang et al.
patent: 7062728 (2006-06-01), Tojima
patent: 7146300 (2006-12-01), Zammit et al.
patent: 2001/0041972 (2001-11-01), Dearth et al.
patent: 2002/0049576 (2002-04-01), Meyer
patent: 2002/0108094 (2002-08-01), Scurry
patent: 2002/0133788 (2002-09-01), Waters et al.
patent: 2002/0138244 (2002-09-01), Meyer
patent: 2002/0188910 (2002-12-01), Zizzo
patent: 2003/0005392 (2003-01-01), Tojima
patent: 2003/0018461 (2003-01-01), Beer et al.
patent: 2003/0061580 (2003-03-01), Greaves
patent: 2003/0233219 (2003-12-01), Landers et al.
patent: 2003/0237062 (2003-12-01), Whitehill
patent: 2004/0143362 (2004-07-01), Matthews et al.
patent: 2004/0143801 (2004-07-01), Walters et al.
patent: 2005/0223191 (2005-10-01), Ferris
patent: 2006/0053404 (2006-03-01), Allen et al.
patent: 2006/0190907 (2006-08-01), Allen et al.
patent: 2006/0259878 (2006-11-01), Killian et al.
patent: 490478 (1992-06-01), None
patent: 560342 (1993-09-01), None
patent: 10260997 (1998-09-01), None
patent: 2003015910 (2003-01-01), None
Pandey et al., “VHDL Semantics and Validating Transformations”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, No. 7, Jul. 1999, pp. 936-955.
Krishnaswamy et al., “A Procedure for Software Synthesis from VHDL Models”, Proceedings of the ASP-DAC '97 Asia and South Pacific Design and Automation Conference, Jan. 28, 1997, pp. 593-598.
Tan et al., “A Fast Signature Simulating Tool for Built-In-Self-Testing Circuits”, 24th Conference on Design Automation, May 28, 1987, pp. 17-25.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Simulation of integrated circuitry within a high-level... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Simulation of integrated circuitry within a high-level..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simulation of integrated circuitry within a high-level... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3803996

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.