Simplified shallow trench isolation formation with no polish sto

Details Simplified shallow trench isolation formation with no polish sto Simplified shallow trench isolation formation with no polish sto

1997-12-18

1999-10-19

Chaudhuri, Olik

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

H01L 2176

Patent

active

059703628

ABSTRACT:
An insulated trench isolation structure is formed in a semiconductor substrate omitting a barrier nitride polish stop layer, thereby simplifying the formation of the trench isolating structure, and enabling the substrate to be polished substantially flush with the trench fill. The planar trench fill-substrate interface avoids additional topography, thereby facilitating application of, and enhancing the accuracy of, photolithographic techniques in forming features with minimal dimensions.

REFERENCES:
patent: 5578518 (1996-11-01), Koike et al.
patent: 5731241 (1998-03-01), Jang et al.
patent: 5770504 (1998-06-01), Brown et al.
patent: 5843226 (1998-12-01), Zhao et al.

Affiliated with

Also associated with

Rating

Simplified shallow trench isolation formation with no polish sto does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Simplified shallow trench isolation formation with no polish sto, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simplified shallow trench isolation formation with no polish sto will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2068611