Silicon trench etch using silicon-containing precursors to...

Details Silicon trench etch using silicon-containing precursors to... Silicon trench etch using silicon-containing precursors to...

2000-11-16

2002-04-30

Whitehead, Jr., Carl (Department: 2822)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S700000, C438S701000, C438S710000, C438S711000

Reexamination Certificate

active

06380095

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to the plasma etching of silicon substrates. The method of the invention is generally applicable to the etching of silicon, but is particularly useful in the etching of deep trenches. A typical deep trench would have a diameter of about 0.15 &mgr;m (or larger) and an aspect ratio as high as about 35:1. Silicon deep trench etching is most commonly used in capacitor technology and in particular in DRAM applications. Other potential applications for the present etching method include the etching of shallow trenches (currently having a typical feature size of about 0.25 &mgr;m to about 0.4 &mgr;m and an aspect ratio of about 1.1 to 2:1) used in applications such as device isolation; the etching of polysilicon gates; and, the etching of silicide layers. In addition, the present etching method is useful for the micro machining of silicon surfaces for biomedical applications, for example. The present method of plasma etching may be used in combination with dielectric, photoresist, and metal masking materials
2. Brief Description of the Background Art
Although the silicon etching method of the present invention is useful in a number of applications, as mentioned above, one of the most important applications is the etching of high aspect ratio (over about 20:1) trench capacitors used in DRAM applications. The profile of the etched trench must meet strictly defined industry standards. The current specification for a 256 Mb DRAM capacitor having a critical diameter ranging from about 0.15 to about 0.38 &mgr;m calls for strict profile taper control. A schematic showing a representative trench structure
100
is presented in FIG.
1
. Trench structure
100
includes a silicon substrate
102
, a dielectric pad oxide layer
104
, a masking layer
106
, and a patterning layer
108
. Typically the dielectric pad oxide layer silicon dioxide, the masking layer is silicon nitride, and the patterning layer material is borosilicate glass (BSG) or a silicon oxide generated using tetraethyl orthosilicate (TEOS), or a combination thereof. In some applications, a dielectric Anti-Reflective Compound (ARC) layer such as siliconoxynitride may be used in combination with the patterning layer. The top portion
110
of the trench
103
, which extends from the silicon surface
105
into the silicon substrate
102
a depth
114
of about 1.5 &mgr;m is specified to taper at an angle of 88.5±0.5°. In general, it is preferred that the angle range from about 87° to about 89°. If the taper were lower, at an angle of 85°, for example, when the critical diameter of the trench is particularly small, for example 0.18 &mgr;m, the opening can be closed off completely if the etch varies during processing. The bottom portion
112
of the trench
103
, which extends beneath the top portion
110
for an additional depth
116
of about 6.5 &mgr;m is specified to taper at an angle of 89.5±0.5°. The bottom of the trench is preferably rounded, and this rounding occurs naturally when the process parameters are as described in the process of the present invention. The bottom portion
112
of the trench may be bottle shaped rather than tapered, as shown in FIG.
7
.
The development of manufacturing technology for fabrication of the trench structure shown in
FIG. 1
(and for silicon trench structures of the future) depends on development of a plasma etch technology which provides adequate selectivity for the silicon substrate over the patterning layer
108
, the masking layer
106
, and the dielectric layer
104
, while providing an economically feasible etch rate for the silicon substrate layer
102
, and, while enabling the profile control necessary to provide the tapers specified above. The plasma etch technology involves a number of materials and process variables.
Related U.S. patent application, Ser. No. 08/985,771, filed Dec. 5, 1997, assigned to the assignee of the present invention and hereby incorporated by reference in its entirety, describes a method for etching high aspect ratio trenches in silicon using a sequential, multistep etch. The plasma source gas composition for the first etch step includes HBr and O
2
and may include a non-reactive nobel gas such as helium or argon. The plasma source gas composition for the second etch step includes a fluorine-containing gas, HBr and O
2
. Examples of gases which may be used to provide a source of fluorine in the second step include SiF
4
, Si
2
F
6
, NF
3
, or SF
6
, with SF
6
being preferred. The first etch step is designed to provide passivation of the sidewalls, protecting the hardmask used for patterning the silicon and maintaining the desired, somewhat tapered, shape of the top of the patterned openings. The second step provides an anisotropic etch at high etch rates. The second etch step is also said to remove passivation material from the trench sidewalls, the etching substrate, and the chamber walls simultaneously.
Subsequent to the work which provided the subject matter disclosed in U.S. patent application, Ser. No. 08/985,771, applicants discovered that the particular fluorine-containing gas used in the second step is critical, not only in determining etch rate, but also with regard to profile control and the accumulation of deposits on the interior surfaces of the process chamber and various processing apparatus enclosed within the chamber. Further, applicants discovered that a single step process is adequate when a particular plasma source gas combination is used.
The present invention pertains to particular etch chemistry which enables silicon etching without mask erosion while providing an etched surface which is free of debris. Using this etch chemistry in combination with processing parameters such as etch chamber pressure, plasma (source) generation power, substrate bias power, and substrate temperature, for example, provides a plasma etch capability meeting silicon deep trench etch requirements. The processing parameters of the kind mentioned above can be provided by equipment known in the art, such as the Silicon Etch DPS (Decoupled Plasma Source) CENTURA® etch system available from Applied Materials, Inc. of Santa Clara, Calif.
SUMMARY OF THE INVENTION
The present invention pertains to an etch chemistry useful for the etching of silicon surfaces. Although the method may be used for applications such as trench isolation and micro machining, it is particularly useful in the deep trench etching of silicon where profile control is particularly important. In the case of deep trench etching, at least a portion of the silicon trench, particularly toward the bottom of the trench, is etched using a combination of reactive gases including fluorine-containing compound which does not contain silicon (FC); a silicon-containing compound (SC), which preferably also contains fluorine; and oxygen (O
2
). When the SC is a fluorine-containing silicon compound, the volumetric ratio of the FC to SC ranges from about 25:1 to about 1:10, and the volumetric ratio of the O
2
to SC ranges from about 10:1 to about 1:10. When the SC is a non-fluorine-containing silicon compound, the volumetric ratio of the FC to SC ranges from about 100:1 to about 1:10, with the volumetric ratio of the O
2
to SC ranges from about 10:1 to about 1:10; and, preferably the volumetric ratio of the FC to SC ranges from about 38:1 to about 1:7.
The FC compound may be selected, for example but not by way of limitation, from the following: F
2
O, F
2
O
2
, NF
3
, NOF, NO
2
F, SF
6
, SF
4
, S
2
F
2
, S
2
F
10
, CF
4
, CH
2
F
2
, CHF
3
, and CH
3
F. The most preferred FC is SF
6
.
When the SC contains fluorine, the SC may be selected, for example but not by way of limitation, from the following: SiF
4
, Si
2
F
6
, SiHF
3
, SiH
2
F
2
, SiH
3
F, Si
2
OF
6
, SiCl
2
F
2
, and SiClF
3
. The most preferred fluorine-containing SC is SiF
4
. When the SC does not contain fluorine, the SC may be selected from silicon-containing compounds such as SiBr
4
, SiHBr
3
, SiH
2
Br
2
, SiH
3
Br, SiCl
4
, SiHCl
3
, SiH
2
Cl
2
,

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