Silicon shallow trench etching with round top corner by...

Details Silicon shallow trench etching with round top corner by... Silicon shallow trench etching with round top corner by...

2001-09-21

2002-12-31

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S435000, C438S437000, C148SDIG005

Reexamination Certificate

active

06500727

ABSTRACT:

BACKGROUND OF THE INVENTION
Shallow trenches having upper rounded top corners may be fabricated using a photoresist mask, but the drawback is severe loading and proximity effect on trench depth and critical dimension (CD) bias. Silicon etching with a hard mask, i.e. a photoresist free method, can gain good uniformity and little proximity effect but it is hard to maintain round top corners.
U.S. Pat. No. 6,180,533 to Jain et al. describes an isotropic plasma etch with a hard mask to round the top corners of an shallow trench isolation (STI) trench.
U.S. Pat. No. 5,807,789 to Chen et al. describes another isotropic plasma etch with a hard mask to round the top corners of an shallow trench isolation (STI) trench.
U.S. Pat. No. 5,843,846 to Nguyen et al. describes an etch process to produce rounded top corners for sub-micron silicon trench applications.
U.S. Pat. No. 4,857,477 to Kanamori describes a process for etching a trench using a first and second mask layer to form the trench.
U.S. Pat. No. 4,729,815 to Leung describes a three step trench etching process to form a vertical trench with rounded top corners.
SUMMARY OF THE INVENTION
Accordingly, it is an object of an embodiment of the present invention to provide an improved round top corner with Cl
2
/O
2
or HBr/O
2
.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a substrate having an oxide layer formed thereover is provided. A hard mask layer is formed over the oxide layer. A patterned patterning layer is formed over the hard mask layer leaving one or more portions of the hard mask layer exposed. The hard mask layer is patterned using the patterned patterning layer as a mask to form a patterned hard mask layer having one or more openings exposing one or more portions of the oxide layer. The patterned patterning layer is removed. The oxide layer is patterned using the patterned hard mask layer as a mask using a first trench etching process to etch through the oxide layer at the one or more exposed portions of the oxide layer and into the substrate to form one or more shallow trenches within the substrate having upper rounded corners at the respective interfaces between substrate and patterned oxide layer. The substrate is further etched at the one or more shallow trenches using a second trench etching process to form one or more completed trenches having the upper rounded corners at the respective interfaces between substrate and patterned oxide layer.


REFERENCES:
patent: 5880004 (1999-03-01), Ho
patent: 6008131 (1999-12-01), Chen
patent: 6218309 (2001-04-01), Miller et al.
patent: 6225187 (2001-05-01), Huang et al.
patent: 6372606 (2002-04-01), Oh
patent: 6444540 (2002-09-01), Kawada et al.

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