Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
1998-12-15
2001-10-16
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S786000, C438S790000, C438S791000, C438S794000, C438S795000, C438S410000
Reexamination Certificate
active
06303520
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an improved insulating film on silicon or silicon-germanium, and a method of making such a film, which has improved characteristics for gate dielectric material in semiconductor devices.
BACKGROUND OF THE INVENTION
The field of rapid thermal processing (RTP) has dealt mainly with the uniformity of heating of the semiconductor wafers treated in the RTP systems. RTP systems generally have a chamber with at least one wall transparent to radiation from sources of radiation such as lamps. The object to be processed is placed in the chamber and irradiated with radiation from the radiation source so that the object is heated. The chamber with the transparent wall is not strictly necessary in the system, provided that the system controls the atmosphere in which the object is placed during processing. The lamps could then be placed in proximity to the object without the intervening window. Much progress has been made in using batteries of lamps with individual control of each lamp to increase uniformity of the illuminating radiation. The uniformity is now sufficient that very thin layers of oxide or nitride may be grown on a silicon wafer in a few seconds.
As silicon integrated circuits are made smaller and smaller, the requirements for the gate dielectrics in MOS field effect transistors grow more stringent. With smaller linewidths, higher speeds and lower power supply voltages; the dielectric in the gate must be made ever thinner. The traditional dielectric material, silicon dioxide (SiO
2
) is no longer adequate. The electrical leakage is too high for SiO
2
dielectrics much below 4 nm in physical thickness. The silicon dioxide also does not prevent boron from diffusing from the heavily doped polysilicon gate electrode through the dielectric and into the channel region of the device. This causes a shift of the flatband voltage and oxide quality that severely degrades device performance. For these and other reasons, dielectrics with higher dielectric constants (“high-k dielectrics”) and dielectrics which contain species which prevent Boron penetration have been desired. With a higher dielectric constant coefficient, the physical thickness of the layer can be increased for a given equivalent electrical thickness (measured by capacitance). This makes processing easier, provides more resistance to boron penetration and improves other electrical properties such as leakage.
One approach to forming higher k layers and Boron penetration resistant layers has been to add nitrogen to the silicon dioxide film, also called a nitrided oxide. Many processes have been described to form a nitrided oxide including annealing the oxide layer in ammonia, growing the film in nitrous oxide (N
2
O) rather than oxygen, annealing an oxide in nitric oxide (NO), etc. All of these techniques have been shown to have various disadvantages including the location of the nitrogen within the film, high thermal budgets and lack of control and repeatability. In particular, nitrogen is found at the interface between the silicon and the silicon dioxide dielectric, which causes a shift in the flat band voltage. The present invention is a film and a process of making the film to form a nitride/oxide stack layer with desirable properties that overcomes the difficulties of prior methods.
RELATED APPLICATIONS
Reactors based on the RTP principle often have the entire cross section of one end of the reactor chamber open during the wafer handling process. This construction has been established because the various wafer holders, guard rings, and gas distribution plates, which have significantly greater dimensions and may be thicker than the wafers, must also be introduced into the chamber and must be easily and quickly changed when the process is changed or when different wafer sizes, for example, are used. The reaction chamber dimensions are designed with these ancillary pieces in mind. U.S. Pat. No. 5,580,830 teaches the importance of the gas flow and the use of an aperture in the door to regulate gas flow and control impurities in the process chamber.
The importance of measuring the temperature of the wafer using a pyrometer of very broad spectral response is taught in U.S. Pat. No. 5,628,564.
The wafer to be heated in a conventional RTP system typically rests on a plurality of quartz pins which hold the wafer accurately parallel to the reflector walls of the system. Prior art systems have rested the wafer on an instrumented susceptor, typically a uniform silicon wafer. Copending patent application Ser. No. 08/537,409 teaches the importance of susceptor plates separated from the wafer.
Rapid thermal processing of III-IV semiconductors has not been as successful as RTP of silicon. One reason for this is that the surface has a relatively high vapor pressure of, for example, arsenic (As) in the case of gallium arsenide (GaAs). The surface region becomes depleted of As, and the material quality suffers. Copending patent application Ser. No. 08/631,265 supplies a method and apparatus for overcoming this problem.
A method of raising the emissivity of a lightly doped, relatively low temperature wafer by locally heating the wafer with a pulse of light is disclosed in copending application Ser. No. 08/632,364.
A method, apparatus, and system for RTP an object is disclosed in copending application Ser. No. 08/953,590, filed Oct. 17, 1997, by Lerch et al.
A method of RTP of a substrate where a small amount of a reactive gas is used to control the etching of oxides or semiconductor is disclosed in copending application Ser. No. 08/886215, by Nenyei et al, filed Jul. 1, 1997.
A method of RTP of a substrate where evaporation of the silicon is controlled is disclosed in copending application Ser. No. 09/015,441, by Marcus et al. filed Jan. 29, 1997.
Methods of rotating the wafer in an RTP system are disclosed in applications Ser. Nos. 08/960,150 and 08/977,019 by Blersch et al. and Aschner et al. filed on Oct. 29, 1997 and Nov. 24, 1997 respectively.
The above identified applications are assigned to the assignee of the present invention and are hereby incorporated herein by reference.
SUMMARY OF THE INVENTION
A film is attached to a silicon or silicon-germanium substrate which has a graded layer of silicon oxynitride, wherein the oxygen content of the layer is substantial at the interface between the film and the substrate, and the nitrogen content of the layer increases with distance from the interface, has been shown to be an improved gate dielectric film. The method of producing such a film is to rapidly thermal process a clean wafer in an atmosphere of a nitrogen containing gas and a very small admixture of an oxygen containing gas. An even more improved film results when the RTP system is then flushed and the process gas replaced with a nitrous oxide gas, and the film is annealed by RTP.
The resulting nitride/oxide stack film has an effective oxide electrical thickness (Teff) of about 25 to 45Å with excellent electrical properties. It shows a leakage current density of almost two orders of magnitude less than a control silicon dioxide film. The flatband voltage is almost identical to the control oxide that indicates that the peak nitrogen concentration is within the film rather than at the oxide-silicon interface as is the case with other processes for nitriding oxides.
REFERENCES:
patent: 4623912 (1986-11-01), Chang et al.
patent: 5861651 (1999-01-01), Brasen et al.
patent: 5904523 (1999-05-01), Feldman et al.
patent: 5970384 (1999-10-01), Yamazaki et al.
patent: 5976991 (1998-06-01), Laxman et al.
patent: 6083852 (2000-07-01), Cheung et al.
patent: 43 33 160A (1995-03-01), None
patent: 0 010 910A (1995-03-01), None
patent: WO 98/27580 (1998-06-01), None
S. V. Hattangady et al, “Controlled nitrogen incorporation at the gate oxide surface” Appl. Phys. Lett. vol. 66 3495, Jun. 19, 1995.
M. L Green et al. Ultrathin SiOxNyby rapid thermal heating of silicon in N2at T = 760-1050 °C Appl. Phys Lett 71 (20), Nov. 17, 1977.
Gelpey Jeff
Kwong Dim-Lee
Marcus Steven D.
Berry Renee R
Hodgson Rodney T.
Mattson Technology Inc.
Nelms David
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