Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1999-09-10
2000-09-19
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438151, 438585, H01L 2100
Patent
active
061210773
ABSTRACT:
An SOI MOSFET having improved electrical characteristics includes a low barrier body contact under the source region, and alternatively under the drain region, to facilitate collection and removal of current carriers generated by impact ionization. Fully-depleted and non-fully-depleted SOI MOSFETs can be integrated on the same chip by providing some transistors with thicker source and drain regions with a recessed channel therebetween and by selective channel dopant implant. Accordingly, digital circuitry and analog circuitry can be combined on one substrate. Improved electrostatic discharge protection is provided by fabricating transistors for the protection circuit directly in the supporting substrate by first removing the silicon thin film and underlying insulation barrier. Alternatively, improved transistors for electrostatic discharge protection can be formed in the silicon film by fabricating the transistor in a plurality of electrically isolated segments, each segment having source and drain regions separated by a channel region with the regions being electrically interconnected with like regions in other segments. Increased ESD current can be realized as compared to the ESD current for a wider unsegmented device.
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Chan Mansun John
Hu Chenming
Ko Ping Keung
Wann Hsing-Jen
Jr. Carl Whitehead
The Regents of the University of California
Vockrodt Jeff
Woodward Henry K.
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