Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-01-30
2003-03-11
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S791000
Reexamination Certificate
active
06531415
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention, relates to the field of microelectronics fabrication. More particularly, the present invention relates to the field of silicon nitride dielectric layers employed within integrated circuit microelectronics fabrications.
2. Description of their Related Art
Microelectronics fabrications employ several different kinds of microelectronics materials, with both patterned and blanket layers being required to embody the various functions which such devices may be required to perform. Among the most widely employed materials are dielectrics, which are formed ranging from extremely thin layers as in field effect transistor (FET) device gate insulation layers to layers of several microns thickness for device passivation and encapsulation. Among the most frequently employed dielectric materials are silicon containing dielectric materials, which are highly stable and readily formed controllably to the general needs of microelectronics fabrication.
Among the silicon containing dielectric materials which are widely employed in microelectronics fabrications, silicon nitride (whose stoichiometric formula is Si
3
N
4
but may be formed over a wide range of Si—N composition) is especially useful as an etch mask and etch stop layer due to its chemical inertness and physical stability. For example, the hardness of silicon nitride layers is superior to practically all other commonly employed inorganic dielectric materials. The amorphous glassy nature of conventional silicon nitride material make it useful for forming homogeneous layers over complex topography without undue concern for anisotropic behaviour with respect to stress, cracking and so forth.
Silicon nitride layers are generally formed by chemical vapor deposition (CVD)at an elevated temperature from reactive gases which act as sources for silicon and nitrogen. Such CVD methods may employ a range of temperatures for thermal activation and may employ additional excitation from energetic sources such as electrical plasmas, ions and other energetic media. In addition, it is common to operate such deposition processes at low pressures substantially below normal atmospheric pressure, in which case the process is more properly described as a low pressure chemical vapor deposition (LPCVD) method. Systems for deposition of such dielectric layers as silicon nitride and the like at elevated are commonly referred to as “furnaces”, but in practice the commonly employed configuration is that of a cylindrical reactor vessel or tube containing the objects to be covered, temperature and gas environment controls. While generally satisfactory for employment in microelectronics fabrication, silicon nitride layers formed employing LPCVD methods in reactor tubes are not without problems.
For instance, it is highly desirable to minimize particulate formation and other inhomogeneities within or about the silicon nitride layers as these may constitute defects in the microelectronics fabrication. It is also important to assure uniformity of thickness, composition, properties, etc. over the entire extent of the substrate or batch of substrates, placed within the reactor tube, which are to be employed within the manufacture of microelectronics fabrications.
It is thus towards the coal of forming upon a substrate employed within a microelectronics fabrication a silicon nitride dielectric layer with attenuated defects and inhomogeneities that the present invention is generally directed.
Various methods have been disclosed for forming a silicon nitride layer employing chemical vapor deposition (CVD) method within a microelectronics fabrication with improved properties.
For example, Hogan et al., in U.S. Pat. No. 4,402,997, disclose a method for forming silicon nitride layers on substrate wafers without streaks. The method employs flowing oxygen gas through the deposition tube between deposition of silicon nitride layers on groups of substrate waters.
Further, Sakai et al., in U.S. Pat. No. 4,699,825, disclose a method for forming silicon nitride film over large wafers with uniformity, high yield, good quality without decreasing film-forming efficiency. The method employs a pressure range of 0.05 to about 0.25 Torr and a temperature range of 700 to 1000° C. for the reaction between silage and ammonia.
Still further, Doan et al., in U.S. Pat. No. 5,032,545, disclose a method for forming silicon nitride layers on silicon substrates which are free of any native surface silicon oxide layer. The method employs a first treatment of the silicon substrate in a rapid thermal processor in an oxidant-free environment to form a thin layer of silicon nitride on a native silicon oxide-free surface, followed by transfer to a conventional silicon nitride furnace where the thin silicon nitride layer may be increased to any desired thickness
Yet further, Kohl et al., in U.S. Pat. No. 5,468,688, disclose a method for forming nitride films on various substrates at low temperatures and near atmospheric pressure. The method employs hydrazine vapor as the source of nitrogen to react with the substrate surface to from the nitride layer.
Still yet further, Chen et al., in U.S. Pat. No. 5,536,330, disclose a method for purging a reactor chamber employed within fabrication of integrated circuit structures wherein a high vacuum is required. The method employs a purge of the system with an inert gas such as argon performed at a temperature of at least 90 degrees centigrade, followed by evacuating the still-heated system to a pareeure of about 5E(−7) Torr to test for leaks before employment.
Yet further still, Friedenreich et al., in U.S. Pat. No. 5,756,404, disclose a method for forming nitride layers on semiconductor integrated circuit substrates in a processing chamber. The method employs a two-step deposition process with a pumping-out of the reactor chamber between the first and second deposition steps.
Yet still further, Yamazaki et al., in U.S. Pat. No. 5,904,567, disclose a method for forming insulating films on substrates with attenuated process problems such as film uniformity and build-up on apparatus and observation ports. The method employs forming the desired layer in a two-step process wherein the second step utilizes a reactive gas to form a layer comprising the first layer and the reactive gas, followed by introducing a cleaning gas including nitrogen trifluride into the chamber.
Finally, Hurley et al., in U.S. Pat. No. 5,939,333, disclose a method for forming silicon nitride layers with improved properties on a substrate surface. The method employs a three-step process of forming first at least a monolayer of silicon on a surface, followed by forming a layer of silicon nitride. The surface of a silicon substrate may also be directly nitridated employing dimethylhydrazine, followed by formation of the remaining silicon nitride layer.
Desirable in the art of microelectronics fabrication are additional methods for forming silicon nitride layers employing chemical vapor deposition (CVD) with improved properties and attenuated defects. It is towards these goals that the present invention is generally and specifically directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for forming upon a substrate employed within a microelectronics fabrication a silicon nitride dielectric layer with attenuated defects and inhomogeneities.
A second object of the present invention is to provide a method in accord with the first object of the present invention, where a silicon nitride dielectric layer is formed, upon one or more semiconductor substrates employed within an integrated circuit microelectronics fabrication, employing low pressure chemical vapor deposition (LPCVD), with attenuated formation within and about the silicon nitride dielectric layer of particulates or imhomogeneities.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, where the method is read
Lee Ren-Dou
Yang Wan-Cheng
Ackerman Stephen B.
Ghyka Alexander
Saile George O.
Stanton Stephen G.
Taiwan Semiconductor Manufacturing Company
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