Silicon nitride and silicon dioxide gate insulator...

Details Silicon nitride and silicon dioxide gate insulator... Silicon nitride and silicon dioxide gate insulator...

2002-06-14

2003-05-13

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S791000

Reexamination Certificate

active

06562729

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This invention is related to an invention for a Method of Reducing Silicon Oxynitride Gate Insulator Thickness in Some Transistors of a Hybrid Integrated Circuit to Obtain Increased Differential in Gate Insulator Thickness with Other Transistors of the Hybrid Circuit, described in U.S. patent application Ser. No. (LSI Docket 00-076), which is filed concurrently herewith, invented by some of the present inventors, and assigned to the assignee of the present invention. The subject matter of this concurrently filed application is incorporated herein by this reference.
FIELD OF THE INVENTION
This invention relates to semiconductor integrated circuits (ICs) of the type which incorporate transistors having relatively thin gate insulators, such as digital switching transistors, and transistors having relatively thick gate insulators, such as analog linearly-responsive transistors, on the same substrate. ICs which incorporate digital and analog transistors on the same substrate are sometimes referred to as
A
hybrid @ ICs. This invention also relates to methods of manufacturing hybrid ICs. More particularly, the present invention relates to a new and improved method of fabricating transistors having a relatively thin gate insulator of silicon nitride and transistors having a relatively thick gate insulator of silicon dioxide, in a singular fabrication process where the formation of the silicon nitride does not adversely influence the formation of the silicon dioxide, and vice versa. The relatively thinner silicon nitride gate insulator of the digital transistors alleviates a problem of leakage current from quantum mechanical tunneling between the gate and substrate while the relatively thicker silicon dioxide gate insulator of the analog transistors maintains desired linear response characteristics of the analog circuitry of the hybrid IC.
BACKGROUND OF THE INVENTION
Recent evolutions of semiconductor IC electronics have combined digital and analog circuitry on the same chip or substrate. Such ICs are known as
A
systems on a chip, @ system level integrated circuits (SLICs) or application specific and integrated circuits (ASICs). The combination digital and analog circuitry on the same IC is also sometimes referred to as
A
hybrid @ or
A
mixed signal @ technology. Combining digital and analog circuitry on a hybrid IC simplifies the construction of many electrical devices which require both digital and analog signals. A single hybrid IC may be used in place of multiple ICs. Previously, it was typical practice to separate the digital circuitry and the analog circuitry, with each type of circuitry confined to its own separate IC and IC package. It was then necessary to connect the separate ICs together with a printed circuit or other connection. Combining the digital and analog circuitry on the same hybrid IC reduces the cost, complexity and size of the electronic circuitry compared to connecting separate digital and analog circuit ICs.
Digital and analog circuitry have somewhat different functional considerations, and satisfying those considerations simultaneously has imposed significant constraints on the semiconductor fabrication techniques used to manufacture hybrid ICs. Since both the digital and analog circuitry must be fabricated on the same substrate, the analog and digital components must be formed simultaneously when fabricating the single hybrid IC. The semiconductor fabrication techniques and processes used for such hybrid circuits must accommodate and secure the required functional behavior of both the digital and analog circuitry. Since semiconductor fabrication techniques may be oriented to optimize the performance of the digital circuitry or the analog circuitry, but usually not both, it is typical that most hybrid ICs are formed by semiconductor fabrication technology which somewhat compromises both the digital and analog functional characteristics.
One area of compromise relates to the functional requirements of the digital switching transistors and the analog linear transistors. Generally speaking, the digital switching transistors operate at a lower voltage on the hybrid IC, typically in the neighborhood of approximately 1.0-1.5 volts. The lower voltages are used because less power is consumed and because the on/off, conductive
onconductive characteristics of the digital switching transistors do not require a linear response between their conductive and nonconductive states. Instead, the primary consideration with respect to digital transistors is achieving higher frequency or higher speed switching rates. In contrast, the analog linear transistors require a larger operating voltage, typically in the neighborhood of approximately 2.5-5.0 volts. The higher voltage is required to develop a sufficient magnitude for the analog signals and to provide the analog transistors with enough voltage range to allow them to operate in their linear transconductance or response range.
The differing functional requirements for digital and analog transistors are revealed perhaps most significantly in regard to the thickness of the gate insulator used in each type of transistor. In digital switching transistors, the gate insulator is kept as thin as possible, because the thinner insulator will result in higher frequency switching capability. Also, the lower operating voltages of digital switching transistors require a thinner insulator to maximize driving current. In analog linear transistors, the gate insulator is kept relatively thick, because a relatively thick gate insulator more effectively establishes linear response characteristics with better noise immunity. The higher operating voltages are also better tolerated by a thicker gate insulator, particularly for reliability considerations. However, in hybrid ICs, where the gate insulators of both the digital and analog transistors must be formed simultaneously, it has been particularly challenging to achieve semiconductor fabrication techniques which permit a relatively thinner gate insulator for the digital transistors and a relatively thicker gate insulator for the analog transistors.
Silicon dioxide is the typical substance used to form the gate insulators of the transistors. Silicon dioxide is formed by oxidizing silicon, which may be performed to form the gate insulators of all of the transistors approximately at the same time within the semiconductor fabrication process. Silicon oxynitride is also sometimes used as a gate insulator, particularly for the thinner gate insulators of the digital transistors. Silicon oxynitride may also be formed by an oxidation step which also simultaneously forms silicon dioxide for the thicker gate insulators of the analog transistors. Formation of the relatively thinner silicon oxynitride gate insulators simultaneously with the relatively thicker silicon dioxide gate insulators is a convenient and effective fabrication step because of the compatibility in forming both substances simultaneously in a single oxidation step.
One problem with relatively thin silicon dioxide or silicon oxynitride gate insulators for the digital transistors is excessive leakage current between a gate and a channel formed in the substrate of the digital transistor. Leakage current detracts or diminishes the performance of the digital transistor. An excessive leakage current can result in very high power dissipation and in the extreme case can disable a digital transistor and render the entire hybrid IC useless. Leakage current results from direct quantum mechanical tunneling of the electrons and holes in the semiconductor material between the gate and the channel. A relatively thin silicon oxynitride or silicon dioxide gate insulator has insufficient dielectric capabilities to prevent such tunneling.
One recognized technique of reducing gate leakage current is to incorporate nitrogen into the relatively thinner gate insulator. An increased nitrogen content has the effect of blocking or inhibiting the tunneling effect of the electrons and holes. Prior

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