Silicon metal-pillar conductors under stagger bond pads

Details Silicon metal-pillar conductors under stagger bond pads Silicon metal-pillar conductors under stagger bond pads

1996-10-22

1999-03-09

Everhart, Caridad

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Die bond

438612, 438618, 257784, 257786, H01L 2348

Patent

active

058805290

ABSTRACT:
A bond pad layout for an integrated circuit die. The die includes a plurality of inner bond pads and a plurality of outer bond pads. To minimize the spacing pitch of the bond pads the die contains an inner layer of metallization that routes the outer bond pads to the inner portion of the integrated circuit. To enhance the structural integrity of the integrated circuit the die contains a plurality of dielectric pillars that support the bond pads. The inner layer of metallization is typically routed around the dielectric pillars so that the metallization does not create stress points in the die.

REFERENCES:
patent: 4010488 (1977-03-01), Gruszka et al.
patent: 4928162 (1990-05-01), Lesk et al.
patent: 5394013 (1995-02-01), Oku et al.
patent: 5441917 (1995-08-01), Rostoker et al.

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